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Single Crystal Silicon Wafer SEM Electron Microscope Scanning XRD Diffraction Oxidation Coated Wafer Silicon Wafer Small Square

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Single Crystal Silicon Wafer SEM Electron Microscope Scanning XRD Diffraction Oxidation Coated Wafer Silicon Wafer Small Square

$41.41$67.46

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SKU: 3256803132930298

Description

  • Certification: NONE
  • Origin: Mainland China


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Type1:4 inches single throw (crystal orientation 111)

 

Type2:4 inch single throw (crystal orientation 100) [experimental only]

Type3:4 inch ultra-thin silicon wafer

 

Type4:4 inch super thick silicon wafer

 

Type5:4 inch silicon oxide wafer

 

 

Polished silicon wafer High purity (11N) 1-12 inch single and double polishing Czochralski single crystal polished wafers
size 1" 2" 3" 4" 5" 6" 8" 12" and special size and specification silicon wafer
surface Single-throwing, double-throwing, grinding, corrosion, cutting
Crystal orientation <100> <111> <110> <211> <511> and silicon wafers with various deflection angles
thickness 100um 200um 300um 400um 500um 1mm 5mm and other various thicknesses, thickness tolerance +-10um, TTV <10um or according to customer requirements, roughness <0.2nm
Conductivity type N-type, P-type, undope (intrinsic high resistance)
Single crystal method Czochralski (CZ), zone melting (FZ), NTD (medium photo)
Resistivity Heavy doping can reach <0.001 ohm.cm, low doping conventional 1~10 ohm.com, medium according to conventional 500~800ohm.cm, zone melting characteristic:> 1000 ohm.cm, >3000 ohm.cm, >5000 ohm. cm,>8000 ohm.cm,>10000 ohm.cm
Process parameters Flatness TIR: ≤3μm, Warpage TTV: ≤10μm, Bow/Warp≤40μm, roughness ≤0.5nm, particle size <≤10ea@> 0.3μ)
Packing Ultra-clean aluminum foil vacuum packaging 10-piece packaging, 25-piece packaging
Custom processing The processing time of model, crystal orientation, thickness, resistivity, etc. is slightly different according to different specifications.
Usage introduction Used for synchrotron radiation sample carrier, PVD/CVD coating as substrate, magnetron sputtering growth sample, XRD, SEM, atomic force, infrared spectroscopy, fluorescence spectroscopy, etc. analysis test substrate, molecular beam epitaxial growth substrate, X-ray analysis Crystalline semiconductor
   
Silicon oxide wafer A silicon dioxide layer is formed on the surface of the thermal oxide. In the presence of an oxidant at an elevated temperature, the process is called thermal oxidation. The thermal oxide layer is usually grown in a horizontal tube furnace. The temperature range is controlled at 900 to 1200 degrees Celsius, using wet or dry growth methods. Thermal oxide is a growing oxide layer. Compared with the oxide layer deposited by CVD method, it has higher uniformity and higher dielectric strength. This is a good dielectric layer as an insulator. In most silicon-based devices, the thermal oxide layer plays a very important role to comfort the surface of the silicon wafer. As a barrier to doping and surface dielectric.
   Application range:
1. Etching rate measurement
2. Metal wire bonding test
3. Metal wafer
4. Electrical insulation layer
Single-sided polishing + double-sided oxidation: 50nm 100nm 200nm 285nm 300nm 500nm 1000nm 2000nm
Single-sided polishing + single-sided oxidation: 100nm 200nm 285nm 300nm500nm 1000nm 2000nm
Double-sided polishing + double-sided oxidation: 100nm 200nm 300nm 500nm
1000nm2000nm
Single-sided polishing + single-sided oxidation, double-sided polishing + single-sided oxidation, intrinsic silicon oxide wafers, ultra-thin and ultra-thick silicon oxide wafers, can be customized.
Various special thicknesses/various resistivities and crystal orientations can be customized and processed; single-sided and double-sided oxidation, the thickness of the substrate and oxide layer is different, and the price is different;
Our company can customize silicon dioxide oxide flakes with different parameters for customers, with excellent quality; the oxide layer thickness, compactness, uniformity and resistivity crystal orientation are all implemented in accordance with national standards. In addition: Our company is an agent of processing silicon wafers, such as crystal pulling, cutting, grinding, polishing, coating and oxidation, etc. Welcome to inquire and process;

Semiconductor power plant, dedicated for equipment testing in scientific research laboratories, 2-3-4-5-6-8 inch polished silicon oxide wafers, high-purity monocrystalline silicon coated electronic microscope scientific research substrate wafers

Please consult the owner before placing an order for specific specifications. Please feel free to ask any questions about silicon wafers.

All scientific research laboratories and semiconductor companies are welcome to order. OEM orders and imported silicon wafers are welcome.